Enterprise Storage · GBA Technology · Published 2026-09-07 · Updated 2026-09-29

PCIe Gen6 SSDs 2026: Can Micron 9650 and PM1763 Cut GPU Wait?

PCIe Gen6 raises the per-lane rate to 64 GT/s, and enterprise SSD sequential reads jump from about 14 GB/s on Gen5 to the 28 GB/s class. Micron 9650 and Samsung PM1763 are in volume production, and Kioxia CM10 is sampling. Doubling single-drive speed, however, does not halve GPU wait time: shared uplinks along the data path, form factor, cooling and write patterns also determine how much data an AI system can actually supply. This article reviews the specifications, form-factor and cooling changes of PCIe Gen6 and Gen5 enterprise SSDs in 2026, and the new roles SSDs play in AI storage.

Key Takeaways

Speed: PCIe Gen6 x4 delivers about 32 GB/s per direction, twice Gen5 x4; Micron 9650 and Samsung PM1763 reach 28,000 MB/s and 28,400 MB/s sequential reads respectively.
Production: Micron 9650 entered volume production in February 2026, Samsung PM1763 in July 2026, and Kioxia CM10 is sampling to customers.
Form factor: Gen6 products center on EDSFF E1.S and E3.S; the U.2 version of Samsung PM1763 and the 2.5-inch version of Kioxia CM10 remain PCIe Gen5.
Cooling: Micron 9650, Samsung PM1763, Kioxia CM10 and SK hynix PEB210 all offer liquid-cooled designs or liquid-cooling compatibility.
AI role: SSDs are extending from dataset storage to KV cache and context memory tiers, with Kioxia CM10 supporting the NVIDIA CMX context memory storage architecture.

PCIe Gen6 Enterprise SSD Overview

Model	Interface	NAND	Form factor	Performance	Capacity	Status
Micron 9650 PRO	PCIe 6.0 x4	Micron G9 TLC	E1.S 9.5mm, E3.S 1T	28,000 MB/s sequential read; 5.5M random read IOPS	7.68 / 15.36 / 30.72 TB (1 DWPD)	Volume production
Micron 9650 MAX	PCIe 6.0 x4	Micron G9 TLC	E1.S 9.5mm, E3.S 1T	28,000 MB/s sequential read; 900K random write IOPS	6.4 / 12.8 / 25.6 TB (3 DWPD)	Volume production
Samsung PM1763	PCIe 6.0 x4 (U.2 version is Gen5)	Samsung 9th-gen V-NAND	E1.S, E3.S, U.2	28,400 MB/s sequential read; 6.8M random read IOPS	Initial production 4 / 8 / 16 TB	Volume production
Kioxia CM10	PCIe 6.0 (2.5-inch version is Gen5)	BiCS FLASH gen 10, 332-layer TLC	E1.S, E3.S, 2.5-inch	About 92% higher sequential read than CM9	1.60 to 61.44 TB (1 / 3 DWPD)	Sampling
Kioxia GP1	PCIe 6.0	—	—	10M random read IOPS, designed for GPU direct access	—	Announced

When GPUs Wait for Data: Find Where

A faster SSD only shortens the storage segment; bottlenecks elsewhere on the data path do not disappear when the drive changes.

A batch of training data passes through reading, decompression, random sampling and transfer before it becomes GPU-ready input. If the time is spent on decompression, a faster SSD may not help; if the uplink shared by several SSDs is already saturated, replacing a single drive will not change total throughput. Inference services behave the same way: model loading, KV cache swapping and checkpoint writes each fall at different points on the data path.

Storage supply in AI systems is a whole-data-path problem. The value of PCIe Gen6 lies in whether it shortens GPU idle time when the data path is genuinely limited by storage bandwidth.

What PCIe Gen6 Brings

PCIe Gen6 raises the per-lane rate from 32 GT/s to 64 GT/s, doubling the bandwidth of an x4 SSD link.

PCIe 6.0 moves to PAM4 signaling and FLIT-based encoding with forward error correction, raising the per-lane rate to 64 GT/s. For the x4 link typical of SSDs, Gen5 delivers about 16 GB/s per direction and Gen6 about 32 GB/s (before protocol overhead). The 28 GB/s sequential read of Micron 9650 already comes close to filling a Gen6 x4 link.

For single-drive Gen6 speed to become system throughput, the entire path must support the same rate:

CPU lanes: The AMD EPYC 9006 SP7 platform provides 96 lanes of PCIe 6.0 per socket and the SP8 platform 128; Intel Diamond Rapids provides 128 lanes of PCIe Gen6.
Switches and retimers: Multi-drive chassis usually connect to the CPU through PCIe switches, where the width and generation of the uplink set the total bandwidth ceiling; Gen6 signals travel shorter distances, making motherboards and backplanes more reliant on retimers.
Backward compatibility: Micron 9650 runs on Gen5 and Gen4 hosts, at the speed of the host's PCIe generation.

For PCIe specifications of each platform, see Server CPUs 2026.

Gen6 SSDs: 9650, PM1763, CM10 and GP1

The first Gen6 enterprise SSDs focus on read performance and local storage in AI servers, with capacities spanning from a few terabytes to more than 60 TB.

Micron 9650: The first PCIe Gen6 data center SSD to reach volume production, starting in February 2026. It uses Micron G9 TLC NAND and an in-house controller, with a PCIe 6.0 x4 interface (compliant with the PCIe 6.2 specification revision) and NVMe 2.0. Sequential read/write is 28,000 / 14,000 MB/s, with up to 5.5 million random read IOPS. The 9650 PRO targets read-intensive work (1 DWPD) and the 9650 MAX mixed workloads (3 DWPD, up to 900K random write IOPS). At a 25W power state, sequential read efficiency is 1,120 MB/s per watt, about twice that of Gen5 products.
Samsung PM1763: Entered volume production in July 2026, using 9th-generation V-NAND and a newly developed 4nm controller. The 16 TB version delivers 28,400 MB/s sequential read and 21,900 MB/s sequential write, with up to 6.8 million random read IOPS, more than twice the sequential performance of the previous PM1753. It complies with NVMe 2.1 and OCP 2.6.
Kioxia CM10: Kioxia's first PCIe 6.0 enterprise SSD, using 332-layer BiCS FLASH generation 10 TLC. Compared with the previous CM9, sequential read is about 92% higher and random read about 85% higher. Capacities range from 1.60 TB to 61.44 TB; it complies with NVMe 2.1 and the OCP Datacenter NVMe SSD Specification 2.7, supports NVMe Flexible Data Placement (FDP), and is sampling to customers.
Kioxia GP1: A PCIe 6.0 SSD delivering 10 million random read IOPS, designed for workloads with GPU direct access.

Gen5 SSDs: Still the Deployment Mainstay

Until Gen6 platforms become widespread, PCIe Gen5 SSDs remain the main choice for enterprise servers; interface generation and product purpose are two separate dimensions.

Micron: The 9550 is a high-performance Gen5 product with about 14,000 MB/s sequential read; the 7600 focuses on low-latency response.
Samsung: PM1743 and its successor PM1753 are high-performance Gen5 products, with PM1753 delivering about 14,500 MB/s sequential read.
SK hynix: PS1010 is an E3.S Gen5 product and PEB110 an E1.S Gen5 product.

Products within the same Gen5 generation can have entirely different positioning: products emphasizing low-queue-depth latency and those emphasizing sustained sequential reads or high capacity answer different needs. Low-queue-depth request latency and sustained large-file reads should be measured separately rather than compared by one peak throughput number. For analysis of high-capacity QLC products, see High-Capacity Enterprise Storage 2026.

Form Factor and Cooling: EDSFF and Liquid Cooling

The electrical requirements and power of PCIe Gen6 are pushing enterprise SSDs toward EDSFF form factors and liquid cooling.

E1.S: Available in thicknesses such as 9.5mm and 15mm for dense 1U servers and GPU servers. The E1.S 9.5mm version of Micron 9650 is optimized for liquid cooling, and the E1.S 9.5mm version of SK hynix PEB210 supports direct liquid cooling.
E3.S: Offered in 1T and 2T thicknesses with more room for power and cooling, and one of the main form factors for Gen6 products; SK hynix has also shown the PS1110 as a high-performance E3.S product.
U.2 / U.3 and 2.5-inch: The U.2 version of Samsung PM1763 and the 2.5-inch version of Kioxia CM10 still use PCIe Gen5, reflecting the limits of traditional 2.5-inch connectors under Gen6 electrical requirements.

On liquid cooling, Samsung PM1763 supports direct-to-chip liquid-cooling designs, and Kioxia CM10 offers direct cold-plate liquid cooling. Micron says the E1.S 9.5mm version of the 9650 is its first SSD optimized for liquid cooling. Form factor, slot, backplane connector and cooling method need to be validated together on the same platform.

New Roles in AI Storage: KV Cache and Context Memory

The role of SSDs in AI systems is extending from holding datasets and checkpoints to expanding the context memory available to GPUs.

Long contexts and agentic inference make KV cache grow rapidly, and the portion that exceeds GPU memory and host memory needs a larger storage tier with acceptable latency. NVIDIA's CMX context memory storage architecture uses flash storage to build a pod-level shared context tier for ephemeral KV cache. Kioxia CM10 is designed for CMX.

Another direction lets GPUs access SSDs directly: with GPU direct storage access, data moves from the SSD straight into GPU memory, reducing the overhead of staging through CPU memory. Kioxia GP1 targets these workloads with 10 million random read IOPS. For the context memory hardware on the Vera Rubin platform, see Enterprise AI GPUs 2026.

Endurance, Writes and Security Features

Read tests cannot capture write bursts during training; endurance should be calculated from actual write volume and write amplification.

Enterprise SSDs rate endurance in drive writes per day (DWPD): read-intensive products are typically 1 DWPD and mixed-use products 3 DWPD, as with Micron 9650 PRO and MAX. Checkpoint writes during training share storage with dataset reads; average throughput may still look healthy, but slower requests extend the wait for the entire job.

NVMe Flexible Data Placement (FDP) lets the host write data with different lifetimes to different areas, helping to reduce write amplification, and Kioxia CM10 supports it. On security, Samsung PM1763 supports TDISP, SPDM and post-quantum cryptography, and Kioxia CM10 also supports post-quantum cryptography and SPDM 1.4.

Evaluation Framework

Dimension	Metrics
Data path	CPU PCIe lane count, switch uplink bandwidth, number of SSDs per path
Read performance	Low-queue-depth latency, sustained sequential read, random read IOPS, with cold start and cache hits measured separately
Write performance	Steady-state writes and read latency during checkpoint write bursts
Endurance	Actual write volume over the warranty period, write amplification, DWPD
Thermals	Temperature and throttling under sustained load, air- or liquid-cooling conditions
System benefit	Share of time GPUs wait for data, model load time

When interpreting test results, record queue depth, block size, steady-state condition and temperature. Under different conditions, measurements of the same SSD can differ widely.

FAQ

How much faster are PCIe Gen6 SSDs than Gen5?: Interface bandwidth doubles: an x4 link rises from about 16 GB/s to about 32 GB/s per direction. On the product side, Micron 9650 and Samsung PM1763 deliver about 28 GB/s sequential reads, roughly twice Gen5 products.
Can PCIe Gen6 SSDs be used in Gen5 servers?: Yes. Micron 9650, for example, runs on Gen5 and Gen4 hosts, but at the speed of the host's PCIe generation, and the form factor and slot must also be compatible.
Why do Gen6 SSDs mostly use E1.S and E3.S?: PCIe Gen6 has stricter signaling requirements, and EDSFF connectors and cooling designs are better suited to them. The U.2 version of Samsung PM1763 and the 2.5-inch version of Kioxia CM10 still use PCIe Gen5.
What new uses do SSDs have in AI inference?: Beyond holding models and datasets, SSDs serve as a storage tier for KV cache and context memory, as in the NVIDIA CMX architecture, expanding the context capacity available to GPUs.

Sources

Last updated: 2026-09-29